This meet-up will dive into some more detail of this specific FHEW hardware accelerator (designed for Alveo U280 FPGA), its challenges and the reasoning behind design choices. FHEW is a challenging scheme to build a hardware accelerator for, and this presentation will elaborate further on the memory interfacing challenges in the Ultrascale+ Architecture.
Jonas Bertels received his BSc and MSc in Electrical Engineering from KU Leuven in 2019 and 2021 respectively, completing his thesis on “Hardware Acceleration of Fully Homomorphic Encryption”. He is currently completing his PhD under supervision of Ingrid Verbauwhede at COSIC, the cryptography research group of the KU Leuven. His primary research focus is the implementation of cryptographic primitives such as the Number Theoretic Transform and modular arithmetic.
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